Stress Screening
Most of the tests that we deal with in manufacture, such as in-circuit and functional tests, are intended to pick up faults that are ‘active and continuously visible’. Ideally, as part of the production process, we also want to expose faults that are either intermittent or latent in nature. These defects result from many causes, but will become apparent as the normal operational cycle of heating and cooling applies stresses that cause eventual failure. Typical latent and intermittent defects include poor solder joints, defective IC wire bonds, semiconductor impurities, semiconductor defects and component drift.
What we need to do is to find some way of applying non-destructive, but still accelerated, tests to production units in order to remove the ‘freak’ failures, and in particular those parts that are likely to fail early in life, yet without reducing the life of good parts.
For components, these accelerated tests are frequently referred to as ‘burn-in’, and this test (described below) is indeed frequently the only stress testing used. However, particularly with more complex assemblies, burn-in may not be the most effective screening procedure, and needs to be supplemented. For example, ‘Thermal Stress Screening’ (TSS) combines burn-in with temperature cycling. Overall, the generic terms ‘process conditioning’, or the more recent ‘Environmental Stress Screening’ (ESS) are to be preferred, since they include the full range of possible tests. Stress screening is a final test performed on production units prior to release to the customer.
Burn-in – The most basic form of screening regime is to temperature soak the board or component, preferably with power applied, a type of testing called ‘burn-in’, in which the operating temperature of the Unit Under Test (UUT) is raised to a pre-determined level for a specified time, typically for 24–72 hours for assemblies, 4–8 hours for components. The technique has been shown to enhance the field failure rate of surviving integrated circuits, and there is much other corroborative evidence.
Burn-in ovens need careful design to provide:
- an even temperature which is not affected by dissipation in the components
- reliable long-life contacts with the UUTs
- reliable fail-safe power supplies
- automatic removal of failed components from the burn-in circuit
- easy device insertion, extraction and handling.
Temperature Cycling – Although simple to apply, burn-in does not adequately simulate the operating conditions or apply the levels of stress encountered in the field in severe environments such as automotive applications. Military test engineers discovered that:
- Most failures uncovered by burn-in actually occurred during power-up or power-down
- increasing the number of these ‘temperature cycles’ induced significantly more failures than would have occurred in the field
- the more complex a product, the more likely temperature cycling was to expose failures more effectively than burn-in.
Temperature (or thermal) cycling tests assess performance at varying temperatures, simulating the operating environment. They are intended to assess the integrity of the overall structure of a surface mount assembly and not just individual solder joints, and will reveal problems such as cracking, delamination, joint fatigue failures, seal failures, and internal breaks in tracks and bond wires.
Temperature cycling tests typically use a single test chamber able to change temperature at 3°C per minute. Although faster rates of change apply a higher level of stress and can shorten test times, the energy transfer requirements are considerable, especially when cooling a hot chamber to below –20°C.
Thermal shock testing achieves a much greater rate of temperature change by mechanically moving UUTs from one temperature chamber to another, but this is generally at the expense of higher cost.
Power Cycling – Power cycling, where power is turned on and off at predetermined intervals, is another technique which grew from the observation that most burn-in failures occurred during power-up or power-down, underpinned by the knowledge that CTE mismatch of package materials causes cyclic strain. Power cycling is particularly effective for semiconductors dissipating substantial power, or assemblies with a high power density, and certainly replicates a real-life situation. However, it can be difficult to relate the results of tests under artificial conditions to the expected life of a component in a real operating situation.
Environmental Conditioning – As well as extremes of temperature and humidity, electronic parts have to withstand different levels of mechanical shock and vibration, exposure to salt spray, sand, dust, oil or chemicals, depending on application.
A typical shock test simulates the stresses resulting from handling, transportation, and operation by applying 5 shock pulses at a selected peak acceleration level for 0.1–0.2ms in each of the 6 possible orientations of a component (relative to its major axis).
This test is for failures due to fracture of the lid seal or lid, or to excessive lid deflection. The direction of mounting is therefore important, since it determines the direction of the stresses in the lid seal and lid, and special mounting fixtures may be required for large multi-chip modules and hybrids.
Three forms of vibration testing are used to apply stress to the UUT:
- Random Vibration applies band- and amplitude-limited random acceleration over a wide frequency range, usually 10–2,000 Hz.
- Sine Vibration, Swept Frequency tests use a swept-frequency or multiple-frequency sinusoidal AC source to detect structural resonances that can cause component failures
- Sine Vibration, Fixed Frequency tests use a single-frequency sine wave, usually no higher than 60 Hz.
The Effectiveness of Screens – The effectiveness of screens varies, the relative value of a test as a means of removing defective parts depending on the application of the module being tested. Figure 3 gives one view of the relative ranking of tests for automotive applications. Gould’s selection of temperature cycling, vibration and high temperature life as the ‘top three’ is probably representative of opinion elsewhere.
Practical Test Sequences – A full set of the tests we have described is expensive, and in consequence its use is restricted to product qualification exercises on mission-critical equipment. However, a suitable selection of tests may be devised to maximise the number of defects discovered at an affordable cost. Such a comprehensive plan, sometimes referred to as Environmental Stress Screening (ESS), is more effective than burn-in in uncovering latent failures.
ESS combines elements such as monitored burn-in, temperature cycling, shock, vibration and other environmental tests, at a severity and in a sequence appropriate for a product’s operating environment. ESS programmes can also include power cycling, stabilisation bakes (at low or high temperatures), hermeticity tests, X-ray tests, particle impact noise detection1, and high-voltage stress. They relate both to complete systems and the components from which they are built.
When and why should we screen? – There will be an optimum split of testing between the various stages of inspection and test, depending both on failure mechanisms and rates, and on the stresses which can be applied at any given stage: screening out device failures would take an order of magnitude longer at board level at 85°C than at device level at 150°C.
As with all accelerated testing, there are two key factors:
- matching the test parameters to the defect mechanism
- applying an optimum stress level to force latent defects to fail consistently; whilst staying within the electrical and mechanical limits of the UUT.
Screening is typically applied to semiconductors and modules to be used in military, avionics and other severe environment, high-integrity systems, particularly if a long operating life is required. Probably the best-known of the standards for screening tests is US MIL-STD-883 Test Methods and Procedures for Microelectronic Devices, the full text of which (600+ pages!) may be downloaded at http://www.dscc.dla.mil/programs/milspec/. Other national and international standards include very similar methods.
MIL-STD-883 and its related specifications suggest a sequence of tests for product conditioning which is well-accepted for military semiconductors, although a small number of good parts will be submitted to destructive testing. It must be emphasised, however, that the screening sequences are generic, and may not be adequate for all applications.
For less severe environments, screening is only justified when:
- the expected proportion defective is sufficiently high that early removal will improve yield in later tests and reliability in service
- the cost of screening is lower than the consequential costs of not screening.
Continued improvements in semiconductor device quality have almost eliminated the previous practice of burn-in on receipt by assemblers. In particular, user burn-in of surface mount packages is not advised, as the extra handling involved could lead to damage and degrade the solderability of the contacts. Where required, manufacturers burn-in components as part of their production process.
Some suppliers would advise that it is particularly important to apply such tests to components that are particularly ‘customer sensitive, such as EEPROMs and other memory. In those cases final functional testing is normally carried out after stress testing, although for new designs useful data can be obtained by testing both before and after.
In commercial practice, given that components are now very reliable, screening of assemblies is normally carried out only on a sample basis for design assurance rather than as a production screen, although operational burn-in was formerly quite usual in the manufacture of products such as monitors.
HASS is a stress screening program to ensure that the final product will exceed its environmental requirements. The design has been proven to be robust using a HALT testing program. The environmental stresses of a HASS program may exceed the product design specifications. Before HASS can be used successfully, accepted process quality procedures must be applied to the process. Processes must have capability measures, such as Cpk, at acceptable levels. Suitable SPC procedures must be in place.
Once the process has demonstrated statistical control it may be possible to replace the HASS test program, which is performed on 100 percent of the production units, with a stress audit program. A statistical approach to the audit that would involve stress screening a sample of the production units is called highly accelerated stress audit (HASA). A HASA test program will detect a process shift but has the risk of allowing some early-life failures to reach the customer.
Attribute Testing
It is used to test products which are used once and produce a single output like accept/reject. Products like sensors which detect application of force thus giving an success or failure. Time, an continuous variable can also be used in tests for measurement like products in an test chamber for testing, are checked for failure. Binomial distribution is usually used to estimate the reliability of units subjected to attribute testing. The estimate of the reliability of the unit for the conditions of test is
A confidence limit could be placed on this estimate of reliability from an attribute test. The confidence limit will involve the use of the F distribution. The confidence value is C. The risk or significance of the test is a = 1 – C.
Zero Failure Test – A point estimate of reliability can not be made if the test results in zero failures. The lower confidence limit on the reliability value RL for a test of n units with zero failures at a confidence value of C is
RL = (1 – C)1/n
The equation for the number of units necessary to test without failure to show a given reliability at a given confidence level, is
